Design and Performance Analysis of a Low-Power Multistage Amplifier for Portable Applications using LTspice

Authors

  • Md. Ali
  • ASM Shamim Hasan
  • Md. Sohel Rana
  • Md. Sumon Ali
  • Syed Tohabbul Murshed

Keywords:

Internet of Things (IoT), Low-power amplifier, LTspice simulation, Multistage amplifier, Voltage gain

Abstract

This study presents the design and simulation of a low-power multistage amplifier intended for modern portable electronic systems. With the rapid expansion of wearable sensors, biomedical monitoring devices, and Internet-of-Things (IoT) technologies, there is a growing demand for analogue circuits capable of delivering high performance while maintaining minimal power consumption. Many of these devices operate using small batteries or energy-harvesting sources, making energy efficiency a critical design requirement. In such systems, analogue amplifiers serve as essential components because they amplify weak electrical signals generated by sensors so that the signals can be accurately processed by subsequent electronic stages. Conventional amplifier designs generally emphasise high gain and wide bandwidth; however, these improvements often lead to higher power dissipation, which is undesirable for portable applications. Consequently, recent research has focused on developing amplifier architectures that preserve strong amplification performance while reducing energy usage. Low-power amplifier design has therefore become a significant area of interest in analogue integrated circuit research. The proposed amplifier architecture consists of three functional stages. The first stage is a differential input stage that performs the initial signal amplification while improving noise rejection and signal accuracy. The second stage operates as the main gain stage, providing substantial voltage amplification while maintaining stability and low power consumption. The third stage functions as an output buffer that isolates the amplifier from the load and enhances its ability to drive external circuits without degrading performance. Simulations performed in the LTspice environment with a 1.8 V supply demonstrate that the amplifier achieves approximately 95 dB voltage gain, a gain-bandwidth product near 1.1 MHz, and total power consumption below 200 µW, indicating a well-balanced and energy-efficient design.

References

J. Dai, “Research and design of low-power operational amplifiers for modern applications,” in Proceedings of the 2025 International Conference on Electronics, Electrical and Grid Technology (ICEEGT 2025), Atlantis Press, 2026.

J. Pérez-Bailón, B. Calvo-López, and N. Medrano, “Reconfigurable low-power CMOS amplifier stages for broadband impedance spectroscopy,” Electronics, vol. 13, no. 9, Apr. 2024.

B. Razavi, Design of analog CMOS integrated circuits, 2nd ed. New York, NY, USA: McGraw-Hill Education, 2017.

A. Sedra and K. Smith, Microelectronic circuits, 8th ed. New York, NY, USA: Oxford University Press, 2020.

Y. Fang, “Design and optimization of two-stage CMOS amplifier,” Proceedings of the 2025 2nd International Conference on Mechanics, Electronics Engineering and Automation (ICMEEA 2025), Atlantis Press, Aug. 2025.

H. Reddy and P. Arora, “A 40 GHz low-power variable-gain low noise amplifier in 28-nm CMOS Process,” arXiv, 2025.

D. G. Poojitha, C. Thoshitha, S. Venkatesh, K. Puneeth, B. V. Prasad, A. A. Rakesh, “Low power two stage CMOS operational amplifier,” International Journal for Research in Applied Science and Engineering Technology (IJRASET), vol. 13, no. 4, pp. 2088–2091, Apr. 2025.

Y. Zhang, Z. Chen, Z. Xu, and Yujin He, “A wide-input 0.25 um BCD LDO with dual-stage amplifier and active ripple cancellation for high psrr and fast transient response,” arXiv, 2025.

M. Sun, F. Yin, and X. Tang, “An ultra-low-power three-stage amplifier using impedance multiplication compensation for nF-range capacitive loads,” Microelectronics Journal, vol. 148, Nov. 2025.

D. E. Dan-Abia, A. Obot, and K. M. Udofia, “Design and analysis of a multistage common emitter amplifier for low frequency applications,” European Journal of Engineering and Technology Research, vol. 4, no. 10, pp. 87–92, Oct. 2019.

J. M. Gonzalez, N. Otegi, A. Anakabe, L. Mori, A. Barcenilla, J.-M. Collantes, “In-circuit characterization of low-frequency stability margins in power amplifiers,” arXiv, 2025.

M. Privitera, A. D. Grasso, A. Ballo, and M. Alioto, “0.6-V, uW-Power 4-Stage OTA with minimal components and 100X load range,” arXiv, 2025.

A. Ben Hammadi, M. A. Doukkali, P. Descamps, and C. Niamien, “A 26–28 GHz, two-stage, low-noise amplifier for fifth-generation radio frequency and millimeter-wave applications,” Sensors, vol. 24, no. 7, Mar. 2024.

L. T. T. Hong, N. N. Thai, N. V. Tien, and T. T. T. Huyen, “Enhancing performance of GaN MMIC power amplifiers through transistor sizing and bias voltage optimization”, Journal of Military Science and Technology, no. IITE, pp. 62–71, Oct. 2025.

J. Tan, Z. Zhou, and G. Zou, “A programmable gate driver module-based multistage voltage regulation SiC MOSFET switching strategy,” Electronics, vol. 13, no. 22, Nov. 2024.

Published

2026-03-31

How to Cite

Md. Ali, ASM Shamim Hasan, Md. Sohel Rana, Md. Sumon Ali, & Syed Tohabbul Murshed. (2026). Design and Performance Analysis of a Low-Power Multistage Amplifier for Portable Applications using LTspice. Journal of Advancement in Electronics Signal Processing, 47–56. Retrieved from https://matjournals.net/engineering/index.php/JoAESP/article/view/3321