Python-based Performance Assessment of InSb/Al2O3 Channel/oxide-based Cylindrical Gate-All-Around FET
DOI:
https://doi.org/10.46610/IJDEMT.2025.v01i02.004Keywords:
Al2O3, CGAA FET, DIBL, InSb, On-off ratio, Python Atlas, Subthreshold swingAbstract
This work presents a python-based complete simulation study for the investigative assessment of an ultra-scaled (channel length is 20 nm only) cylindrical Gate-All-Around FET (CGAA FET), wherein high-mobility InSb semiconductor and high-k Al2O3 dielectric are used as the channel and oxide material respectively. The CGAA structure ensures excellent gate control, leading to the suppression of undesirable short-channel effects. On the other hand, high-mobility channel and high-k oxide materials promote higher drive current leading to its improved performance metrics. The structure parameters and material properties were defined as per quantum-scale considerations. The device is shown to be performing exceptionally in terms of performance metrics including sub-threshold swing of 68 mV/dec, Drain-Induced Barrier Lowering (DIBL) of 45 mV/V, and high ION/IOFF ratio that exceeds 105. Quantum mechanical simulations are shown to provide remarkable improvements in electrostatic control and carrier transport compared to conventional silicon-based devices. The optimized doping profile and quantum confinement effects contribute to enhanced device characteristics, which makes lnSb GAAFETs strong contender for sub-5 nm technology nodes. The results demonstrate that stronger electrostatic control has been achieved by the CGAA geometry and also highlight the potential of InSb and Al2O3 as prospective channel and oxide materials for nanoscale FETs.
References
M. Liang, H. Yan, N. Wazir, C. Zhou, and Z. Ma, “Two-dimensional semiconductors for state-of-the-art complementary field-effect transistors and integrated circuits,” Nanomaterials, vol. 14, no. 17, p. 1408, Aug. 2024, doi: https://doi.org/10.3390/nano14171408
I. B. Chowdhury and A. Haque, “Accurate determination of gate capacitance in deep submicron MOSFETs using an improved boundary condition,” in Proc. Int. Conf. Electr. Comput. Eng. (ICECE), Dhaka, Bangladesh, Jan. 2001. Available: https://www.researchgate.net/publication/330117540_Accurate_determination_of_gate_capacitance_in_deep_submicron_MOSFETs_using_an_im-proved_boundary_condition
M. I. B. Chowdhury, “Study of the quantization effects in MOS inversion layer using an improved approach,” BUET, 2025. Available: http://lib.buet.ac.bd:8080/xmlui/handle/123456789/1736
A. Haque, A. Rahman, and I. B. Chowdhury, “On the use of appropriate boundary conditions to calculate the normalized wave functions in the inversion layers of MOSFETs with ultra-thin gate oxides,” Solid-State Electronics, vol. 44, no. 10, pp. 1833–1836, Oct. 2000, doi: https://doi.org/10.1016/s0038-1101(00)00115-5
M. I. B. Chowdhury, “Ion-sensitive vertical tunnel field-effect transistor for highly sensitive, low power, low pH-resolution pH sensing,” IEEE Sensors Letters, vol. 8, no. 1, pp. 1–4, Jan. 2024, doi: https://doi.org/10.1109/lsens.2023.3341887
M. Amina, P. Biswas, and A. Ullah, “Analysis of common-mode rejection ratio of a CMOS differential amplifier considering all the non-idealities,” 2015 2nd International Conference on Electrical Information and Communication Technologies (EICT), Khulna, Bangladesh, Dec. 2015, doi: https://doi.org/10.1109/eict.2015.7391952
K. Seshan, “Limits and hurdles to continued CMOS scaling,” in Handbook of Thin Film Deposition, K. Seshan and D. Schepis, Eds., 4th ed.William Andrew, 2018.
M. N. Reddy and D. K. Panda, “A comprehensive review on FinFET in terms of its device structure and performance matrices,” Silicon, vol. 14, pp. 12015–12030, May 2022, doi: https://doi.org/10.1007/s12633-022-01929-8
A. B. Siddik, M. Mahmud, S. Quader, and M. Iqbal, “Silicon on metal technology merged with cylindrical gate all around FET for enhanced performance,” 2017 3rd International Conference on Electrical Information and Communication Technology (EICT), Khulna, Bangladesh, pp. 1–4, Dec. 2017, doi: https://doi.org/10.1109/eict.2017.8275181
M. Mahmud, S. Quader, A. B. Siddik, and M. Iqbal, “TCAD based performance analysis of junctionless cylindrical double gate all around FET up to 5nm technology node,” In 2017 20th International Conference of Computer and Information Technology (ICCIT), Dhaka, Bangladesh, Dec. 2017, doi: https://doi.org/10.1109/iccitechn.2017.8281858
S. Quader, A. B. Siddik, M. Mahmud, and M. Iqbal, “Channel engineered cylindrical double gate all around FET for low power VLSI applications,” 2018 International Conference on Computer, Communication, Chemical, Material and Electronic Engineering (IC4ME2), Rajshahi, Bangladesh, Feb. 2018, doi: https://doi.org/10.1109/ic4me2.2018.8465589
J. A. del Alamo, “Nanometre-scale electronics with III–V compound semiconductors,” Nature, vol. 479, no. 7373, pp. 317–323, Nov. 2011, doi: https://doi.org/10.1038/nature10677
M. J. Islam, M. Iqbal, M. M. Hasan, and M. J. Islam, “Silvaco TCAD based analysis of cylindrical gate -All-around FET having indium arsenide as channel and aluminium oxide as gate dielectrics,” Journal of Nanotechnology and its Applications in Engineering, vol. 1, no. 1, pp. 1–12, Jul. 2016, Available: https://www.researchgate.net/publication/305462851
M. I. B. Chowdhury, “A novel cylindrical gate-all-around MOSFET using InAs as channel and HfO₂ as gate oxide,” Zenodo (CERN European Organization for Nuclear Research), Nov. 2014. doi: https://doi.org/10.5281/zenodo.15318693
P. J. Chakraborty, M. M. Islam, R. Ahamed, and M. Iqbal, “Sub-20nm GaAs-based cylindrical gate-all-around FETs for improved performance,” 2021 2nd International Conference on Robotics, Electrical and Signal Processing Techniques (ICREST), Dhaka, Bangladesh, vol. 479, pp. 473–477, Jan. 2021, doi: https://doi.org/10.1109/icrest51555.2021.9331160
M. I. B. Chowdhury, “Germanium-silicon based hetero junction cylindrical gate all around field effect transistor for improved performance,” Zenodo (CERN European Organization for Nuclear Research), Sep. 2017, doi: https://doi.org/10.5281/zenodo.15320001
Z. Alam, P. C. Paul, N. Mayeen, N. Alam, and I. Bahar, “Switching power of CNFET based 6-transistor 1-bit fast adder implemented using Cadence,” Advances in Mathematics Scientific Journal, vol. 9, no. 6, pp. 3585–3596, Jul. 2020, doi: https://doi.org/10.37418/amsj.9.6.36
M. I. B. Chowdhury, “Study of characteristics curves top-gated graphene FET using SILVACO TCAD,” Zenodo (CERN European Organization for Nuclear Research), Dec. 2017, doi: https://doi.org/10.5281/zenodo.15319749
M. Radosavljevic et al., “High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications,” 2008 IEEE International Electron Devices Meeting, San Francisco, CA, USA, 2008, pp. 1–4, doi: https://doi.org/10.1109/iedm.2008.4796798
U. H. Disha, F. Ashrafi Promi, S. Nafisa Tasnim, Z. Maua, F. Alam, and M. Iqbal, “Design and optimization of a two-stage Miller compensated OTA for cystic fibrosis diagnosis in 45 nm technology using Cadence,” Recent Trends in Semiconductor and Sensor Technology, vol. 2, no. 2, pp. 19–33, Jan. 2025, doi: https://doi.org/10.46610/rtsst.2025.v02i02.003
M. R. Huqe, H. M. Aziz, K. M. Kolince, M. S. Uddin, and B. Chowdhury, “Effect of Ge-dosing profile of exponentially-doped base on the internal quantum efficiency of a SiGe solar cell,” International Conference on Devices, Circuits and Systems (ICDCS 2012), Coimbatore, India, Mar. 2012, pp. 119–123, doi: https://doi.org/10.1109/icdcsyst.2012.6188686
S. A. Rivon, P. Biswas, A. S. Hasan, A. B. Rahim, and M. Iqbal, “Analytical modelling of Cds/CdTe based thin film solar cells considering surface recombination,” 2nd International Conference on Electrical Engineering and Information and Communication Technology (iCEEiCT), Dhaka, Bangladesh, pp. 1–5, Sep. 2016, doi: https://doi.org/10.1109/ceeict.2016.7873135
Md. R. Huqe and Md. I. B. Chowdhury, “Internal quantum efficiency of Si-drift solar cells with nonuniformly and heavily doped emitter,” 2016 4th International Conference on the Development in the Renewable Energy Technology (ICDRET), Dhaka, Bangladesh, Jan. 2016, pp. 1–4, doi: https://doi.org/10.1109/icdret.2016.7421523
M. M. Hasan and M. Iqbal, “Modelling and analysis of CdS/CZTSSe based thin film solar cell,” Journal of Modeling and Optimization, vol. 10, no. 2, pp. 88–93, 2018, Available: https://xpublication.com/index.php/jmo/article/view/220
A. Islam and M. I. B. Chowdhury, “A simulink based generalized model of PV cell / array,” 2014 3rd International Conference on the Developments in Renewable Energy Technology (ICDRET), Dhaka, Bangladesh, 2014, pp. 1–5, doi: https://doi.org/10.1109/ICDRET.2014.6861683
A. Islam and M. I. B. Chowdhury, “Simulation of two-diode model based PV solar cell/array: A simulink approach,” 1st International Conference on Research in Science, Engineering & Management (IOCRSEM 2014), Available: https://www.researchgate.net/publication/330117425
M. T. Rahamoni, S. Kabir, M. H. Parvez, S. Islam, and M. Iqbal, “Towards the portability of a capacitive-sensor based non-invasive glucometer: A simulation approach,” 2020 IEEE International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE), Bhubaneswar, India, pp. 94–97, Dec. 2020, doi: https://doi.org/10.1109/wiecon-ece52138.2020.9398027
M. Z. A. Emon, K. M. Salim, and M. I. B. Chowdhury, “A study on source degenerated telescopic OpAmp for biomedical applications,” in Innovations in Electrical and Electronics Engineering, A. Kalam, S. Mekhilef, and S. S. Williamson, Eds., Lecture Notes in Electrical Engineering, vol. 1294. Singapore: Springer, pp. 339–353, Jan. 2025, doi: https://doi.org/10.1007/978-981-97-9037-1_24
M. Zubair and M. Iqbal, “Low threshold voltage MOSFET: A potential candidate for biomedical IC design,” In 2024 International Conference on Advances in Computing, Communication, Electrical, and Smart Systems (iCACCESS), Dhaka, Bangladesh, pp. 1–6, Mar. 2024, doi: https://doi.org/10.1109/icaccess61735.2024.10499508
M. Z. A. Emon, K. M. Salim, and M. I. B. Chowdhury, “Design and analysis of a high-gain, low-noise, and low-power analog front end for electrocardiogram acquisition in 45 nm technology using gm/ID method,” Electronics, vol. 13, no. 11, p. 2190, Jan. 2024. doi: https://doi.org/10.3390/electronics13112190
Md. Mosabbir. Hossain et al., “Simulation-driven fabrication and performance evaluation of n-MOSFET using Silvaco Athena and Atlas: From process to parameters,” Journal of Microprocessor and Microcontroller Research., vol. 1, no. 3, pp. 21–43, Nov. 2014, doi: https://doi.org/10.46610/jommr.2024.v01i03.003
W. H. Chowdhury, Z. A. Sara, M. M. Miah, M. Das, and M. Iqbal, “Efficiency enhancement of a PCDTBT/PC71 BM-based organic solar cell through layer-thickness optimization,” 2021 2nd International Conference on Robotics, Electrical and Signal Processing Techniques (ICREST), pp. 684–688, Jan. 2021, doi: https://doi.org/10.1109/icrest51555.2021.9331006
S. Mostafa, M. Nadeem, M. Imran, M. J. Islam, and M. Iqbal, “Performance optimization of quantum well solar cells through layer thickness variation,” 2020 23rd International Conference on Computer and Information Technology (ICCIT), pp. 1–6, Dec. 2020, doi: https://doi.org/10.1109/iccit51783.2020.9392741
M. N. Islam, D. Chowdhury, M. J. Islam, M. L. Rahaman, and M. Iqbal, “A high-efficiency dye-sensitized solar cell using PCDTBT: PCBM as solid electrolyte and graphene oxide as hole transport layer,” In 2024 6th International Conference on Electrical Engineering and Information & Communication Technology (iCEEICT), pp. 933–938, May 2024, doi: https://doi.org/10.1109/iceeict62016.2024.10534413
Md. N. Islam, Md. H. D. Chowdhury, Md. R. H. Chowdhury, M. J. Islam, and Md. I. B. Chowdhury, “TCAD implementation of a cost-effective, stable, and highly-efficient PCDTBT: PCBM-based organic solar cell,” Lecture Notes in Electrical Engineering, pp. 413–427, 2025, doi: https://doi.org/10.1007/978-981-97-9037-1_29
A. J. García-Loureiro, N. Seoane, J. G. Fernández, and E. Comesaña, “A general toolkit for advanced semiconductor transistors: From simulation to machine learning,” IEEE Journal of the Electron Devices Society, vol. 12, pp. 1057–1064, 2024, doi: https://doi.org/10.1109/jeds.2024.3401852
A. Akbar, Y. Li, and W.-L. Sung, “Transfer learning approach to analyzing the work function fluctuation of gate-all-around silicon nanofin field-effect transistors,” Computers and Electrical Engineering, vol. 103, p. 108392, Oct. 2022, doi: https://doi.org/10.1016/j.compeleceng.2022.108392
H. Carrillo-Nunez, N. Dimitrova, A. Asenov, and V. P. Georgiev, “Machine learning approach for predicting the effect of statistical variability in Si junctionless nanowire transistors,” IEEE Electron Device Letters, vol. 40, no. 9, pp. 1366–1369, Sep. 2019, doi: https://doi.org/10.1109/led.2019.2931839
T. Ashley et al., “Novel Insb-based quantum well transistors for ultra-high speed, low power logic applications,” Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, 2004, pp. 2253–2256 vol. 3, doi: https://doi.org/10.1109/icsict.2004.1435293
G. D. Wilk, R. M. Wallace, and J. M. Anthony, “High-κ gate dielectrics: Current status and materials properties considerations,” Journal of Applied Physics, vol. 89, no. 10, pp. 5243–5275, May 2001, doi: https://doi.org/10.1063/1.1361065
C.-W. Lee et al., “Performance estimation of junctionless multigate transistors,” Solid-State Electronics, vol. 54, no. 2, pp. 97–103, Feb. 2010, doi: https://doi.org/10.1016/j.sse.2009.12.003
