https://matjournals.net/engineering/index.php/RRECE/issue/feed Research & Review: Electronics and Communication Engineering 2026-09-30T06:59:45+00:00 Open Journal Systems <p><strong>RRECE</strong> is a peer-reviewed journal in the field of Electronics Engineering published by MAT Journals Pvt. Ltd. RRECE is a print e-journal focused on the rapid publication of fundamental research papers on all areas of Electronics and Communication Systems. This Journal involves the basic principles of individual communications networks, transmission systems, relay stations, tributary stations, Antennas, wave propagation and data terminal equipment. The Journal aims to promote high-quality research, review articles, and case studies, mainly focusing on Electronic Sensors and Sensory Systems, Mobile Communication, Networking, Wide-Band CDMA (W-CDMA), Multi-Code CDMA (MC-CDMA), Telecommunications, Modulation Techniques, Analog Communication Systems, Digital Communication Systems. This journal involves comprehensive coverage of all theoretical and experimental aspects of electronic and communication engineering.</p> https://matjournals.net/engineering/index.php/RRECE/article/view/4197 High-Gain Switched-Capacitor Multilevel Inverters for Renewable Energy Conversion 2026-09-30T06:40:28+00:00 Pawan Singh Kushwah pawankushwah1596@gmail.com Shweta Raj pawankushwah1596@gmail.com <p><span style="font-style: normal !msorm;"><em>Switched-capacitor multilevel inverters (SCMLIs) are an important transformerless</em></span><span style="font-style: normal !msorm;"><em> path towards high-gain, high-quality power conversion from low direct-current to multilevel alternating currents for scalable applications such as solar photovoltaic and distributed renewable energy sources, utilizing only capacitors and semiconductor swi</em></span><span style="font-style: normal !msorm;"><em>tches. In this paper, recent research advances in the implementation of circuit- and control-level 17-level and closely related high-level SCMLI structures, compiled from </em></span><span style="font-style: normal !msorm;"><em>48 </em></span><span style="font-style: normal !msorm;"><em>peer-reviewed papers from IEEE, Elsevier, Springer and MDPI, are revie</em></span><span style="font-style: normal !msorm;"><em>wed. The topologies are divided into four structural families: CT-/T-type hybrids, cross-switched and modular hybrid topologies, common-ground configurations</em></span><span style="font-style: normal !msorm;"><em>,</em></span><span style="font-style: normal !msorm;"><em> and cascaded or neutral-point-clamped derivatives, and are compared on the basis of the following</em></span><span style="font-style: normal !msorm;"><em> parameters: output-level count, voltage-boosting factor, total standing voltage, active-device count</em></span><span style="font-style: normal !msorm;"><em>,</em></span><span style="font-style: normal !msorm;"><em> and measured conversion efficiency. Inherent capacitor self-balancing occurs in a majority of the designs in the set and is demonstrated in most of the r</em></span><span style="font-style: normal !msorm;"><em>eviewed designs to eliminate dedicated voltage-sensing loops, and common-ground switching is reportedly the preferred method to suppress leakage currents in transformerless PV strings. Nearest-level control and selective/level-shifted pulse-width-modulatio</em></span><span style="font-style: normal !msorm;"><em>n schemes are shown to jointly dictate how the harmonic quality and switching loss trade off, and several designs are identified that achieve seven- to eight-fold voltage gain from a single low-voltage source with a reduced number of semiconductors while m</em></span><span style="font-style: normal !msorm;"><em>aintaining high harmonic quality. Nevertheless, through the synthesis, it also reveals several shortcomings in the state of reporting the total standing voltage, high power, experimental verification, mitigation of inrush currents in capacitors, and the fo</em></span><span style="font-style: normal !msorm;"><em>rmal modelling of reliability within standard performance power-conversion interfaces, defining those as priority avenues for design optimization of the next generation of high-level power-conversion interfaces.</em></span></p> 2026-09-30T00:00:00+00:00 Copyright (c) 2026 Research & Review: Electronics and Communication Engineering