Vejendla, N., Dr.R., . R. R. and Narayanam, B. (2026) “Novel Time-Domain Interleaved Multiplier Sharing Architecture for Ultra-High Throughput FFT Processors”, Journal of VLSI Design and Signal Processing, 12(1), pp. 28–38. doi: 10.46610/JOVDSP.2026.v12i01.003.