PURAM VAMSHI; MAHESH KUMAR N; PRATYUSH; R HARINANDAN. Design and Implementation of an 8-bit Universal Shift Register using Verilog. Journal of VLSI Design and Signal Processing, [S. l.], v. 10, n. 2, p. 27–30, 2024. Disponível em: https://matjournals.net/engineering/index.php/JOVDSP/article/view/836. Acesso em: 24 oct. 2025.