SRABONI DHAR; SATYENDRA NATH BISWAS. Sleep Logic-based Low Power Circuit Design by Using Modified Gate Diffusion Input Technique. Journal of VLSI Design and Signal Processing, [S. l.], v. 10, n. 2, p. 1–9, 2024. Disponível em: https://matjournals.net/engineering/index.php/JOVDSP/article/view/561. Acesso em: 25 oct. 2025.