Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED en-US Mon, 12 Jan 2026 12:11:07 +0000 OJS 3.3.0.8 http://blogs.law.harvard.edu/tech/rss 60 SmartGuard: An IoT-based Home Surveillance System using ESP2866 https://matjournals.net/engineering/index.php/JDCIED/article/view/3136 <p><em>SmartGuard is an intelligent home security system designed to continuously monitor residential environments for suspicious activities or unauthorized access using sensors such as Passive Infrared (PIR) motion sensors and optional camera modules. The system actively scans the protected area and instantly alerts homeowners through a web interface or mobile application upon detecting an intrusion. By leveraging cloud services and wireless connectivity, SmartGuard enables remote monitoring and control from any location worldwide, ensuring enhanced convenience and real-time responsiveness. The proposed solution is reliable, cost-effective, energy-efficient, and easy to install, making it well-suited for modern smart home applications. This study focuses on the enhancement of home security applications and their practical usage to protect devices from theft, prevent cut-off or tampering conditions, and enable on-demand activation of devices whenever required. Emphasis is placed on developing new application features that improve safety, accessibility, and operational control within smart home environments. The system adopts a hardware-based approach for interfacing various components, ensuring stable performance and efficient real-time operation. Overall, this work aims to strengthen security for home applications and their surrounding areas by integrating intelligent sensing, remote access, and automated alert mechanisms, thereby contributing to safer and smarter living spaces. </em></p> V. Shavali, J. D. Jyothi, B. S. Babavali, K. D. Kalyan, K. Sai Vinay, T. Tarnika Copyright (c) 2026 Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED/article/view/3136 Mon, 23 Feb 2026 00:00:00 +0000 Experimental Analysis of Loss Reduction and Efficiency Enhancement in DC Generators using Advanced Materials https://matjournals.net/engineering/index.php/JDCIED/article/view/3312 <p><em>This paper presents an investigation into loss minimisation techniques in DC generators through the application of advanced materials aimed at improving efficiency and operational reliability. Conventional DC generators experience significant energy losses in the form of copper losses, core losses, mechanical losses, and brush contact losses, which collectively degrade performance and increase thermal stress. To address these challenges, this study explores the use of high-conductivity copper–silver (Cu–Ag) alloys for armature windings, amorphous magnetic materials for core construction, graphene-based brushes for improved electrical contact, and ceramic bearings for reduced mechanical friction. A comparative analysis between conventional and advanced-material-based generator models is conducted using both simulation and experimental validation under varying load conditions. The results demonstrate a substantial reduction in total losses, with core losses reduced by up to 30% and overall efficiency improved from 82% to approximately 91%. Additionally, thermal performance is significantly enhanced, with noticeable reductions in operating temperature across all load levels. The integration of advanced materials also contributes to improved durability, reduced maintenance requirements, and longer service life. The findings highlight the critical role of material innovation in enhancing the performance of electrical machines. This study provides a practical and scalable approach for modernising DC generator systems, making them more energy-efficient and suitable for industrial and renewable energy applications.</em></p> Syed Tohabbul Murshed, Md. Ali, Md. Sohel Rana, ASM Shamim Hasan, Md. Sumon Ali Copyright (c) 2026 Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED/article/view/3312 Mon, 30 Mar 2026 00:00:00 +0000 IoT-based Smart Helmet for Public Safety System https://matjournals.net/engineering/index.php/JDCIED/article/view/3314 <p><em>The smart helmet system is an IoT-based concept that makes riding a bike much safer than before. The objective of the project is to stop the rider from riding the vehicle if he is not wearing a helmet or consuming alcohol. In addition to stopping the rider from starting the vehicle, it also notifies specific people via SMS about the passenger’s alcohol consumption through the IFTTT applet service. This smart helmet system is divided into two sections—the transmitter section on the helmet part and the receiver section on the bike part. The alcohol sensor and helmet sensor (i.e. limit switch) are attached to the helmet module and the Node MCU ESP8266 processor module is connected to the bike. The RF transmitter in the transmitter section is used to transfer the sensor signals to the receiver section. The RF receiver collects the transmitted signal and gives the signal to the processor. The processor decides the ignition of the engine depending on the signals received.</em></p> S. Arockiaraj Copyright (c) 2026 Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED/article/view/3314 Mon, 30 Mar 2026 00:00:00 +0000 Design and Performance Analysis of a 45 nm CMOS BCD Adder using LTSpice Simulation https://matjournals.net/engineering/index.php/JDCIED/article/view/3334 <p><em>Binary-Coded Decimal (BCD) arithmetic continues to play a vital role in commercial and business calculations, wherever exact number accuracy is non-negotiable. Conventional BCD adders usually follow a two-stage approach—initially performing binary addition, then applying a modification step if the middle result goes beyond the valid BCD range. This extra modification stage, however, adds noticeable propagation delay and increases hardware complexity. This paper introduces a high-speed, low-power CMOS-based BCD adder that embeds the correction logic directly into the core computational path, eliminating the need for a separate stage. The design employs a compact two-level architecture built around Netlist1 and Netlist2, which efficiently handle intermediate calculations and directly produce the final BCD sum and carry outputs. Implemented in 45 nm CMOS technology and thoroughly simulated in LTSpice-24 across multiple supply voltages, the circuit delivers strong results: average power dissipation of 399.423 pW at 1.5 V, rising to 579.034 pW at 1.8 V and 1129 pW at 2.5 V. The transistor count remains fixed at 366, yet the architecture still offers markedly better computational efficiency. Overall, the proposed BCD adder provides an excellent solution for high-speed, energy-efficient decimal arithmetic in today’s digital systems.</em></p> Redrouthu Harshitha, Vasa Geethika, Tummuri Yaswanth, Shaik Khaja Parveen, Akula Mallaiah Copyright (c) 2026 Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED/article/view/3334 Wed, 01 Apr 2026 00:00:00 +0000 IoT Smart Water Heater with GSM Alerts https://matjournals.net/engineering/index.php/JDCIED/article/view/3345 <p><em>Domestic water heaters frequently consume excessive electrical energy due to inefficient continuous heating cycles and a lack of intelligent scheduling. This paper presents the development of an energy-efficient, Internet of Things (IoT) enabled smart geyser control system designed to mitigate standby power loss while maintaining optimal convenience. The proposed architecture utilises an ESP32 microcontroller integrated with a high-precision MAX6675 thermocouple for accurate, real-time water temperature monitoring. To ensure uninterrupted accessibility, the system features a dual-interface control mechanism, a local 4×4 matrix keypad with an I2C LCD for offline physical interaction, and a responsive web-based dashboard for remote operation via a local area network. A critical focus was placed on operational safety and hardware longevity. The control logic incorporates a strict temperature hysteresis band (maintaining water between 60°C and 65°C) to prevent relay chatter and mechanical wear. Furthermore, a multi-tiered fail-safe protocol is implemented, featuring a hard-coded absolute thermal cutoff at 85°C. In the event of an over-temperature anomaly or upon the successful completion of a user-defined heating cycle, a secondary cellular fallback mechanism employing a SIM800L GSM module dispatches immediate SMS alerts, ensuring critical notifications are delivered regardless of Wi-Fi connectivity. The resulting prototype offers a highly cost-effective retrofit solution that significantly reduces energy consumption without compromising safety.</em></p> Andhale Pratiksha, Patil Mansi, Khorkar Snehal, Wale Pooja Copyright (c) 2026 Journal of Digital Circuitry Innovations in Electrical Devices https://matjournals.net/engineering/index.php/JDCIED/article/view/3345 Thu, 02 Apr 2026 00:00:00 +0000