International Journal of Embedded System and VLSI Design

Python/Silvaco-based Performance Simulation and Quantum Analysis of a 14 nm Si/Si3N4 Cylindrical GAA FET

2026-02-07T07:02:50+00:00

This study presents a comprehensive TCAD and Python-based simulation study of an aggressively scaled (channel length is only 14 nm) cylindrical Gate-All-Around Field-Effect Transistor (CGAA FET) featuring a silicon channel and Si₃N₄high-κ gate dielectric. The CGAA structure enhances superior gate control, leading to the suppression of short-channel effects and hence, its lower power consumption, whereas Si₃N₄increases the drive current, leading to its high-speed operation. Using Silvaco ATLAS Technology Computer-Aided Design simulations with quantum mechanical models and postprocessing Python scripts, the device’s electrical performance, quantum confinement effects, and scalability was characterised. Key extracted parameters at V_DS= 0.05 V include a threshold voltage (V_T) of 0.32 V, subthreshold swing (SS) of 68.5 mV/dec, drain-induced barrier lowering (DIBL) of 36.7 mV/V, and an on/off current ratio (I_on/I_off) of 7.8 × 10⁷. Detailed analysis of energy band diagrams, density of states, and wave functions confirms strong quantum confinement in the 3 nm thick channel. The GAA architecture demonstrates excellent electrostatic control, making it promising for sub-10nm CMOS technology nodes.

Experimental Investigation of Attenuation and Chromatic Dispersion in Single-Mode Optical Fiber under Varying Environmental Conditions

2026-05-04T10:04:23+00:00

This study presents an experimental investigation of attenuation and chromatic dispersion in single-mode optical fiber under varying environmental conditions, including temperature fluctuations and mechanical bending. The objective is to evaluate how these external factors influence signal degradation and overall transmission performance in modern optical communication systems. A dual-wavelength laser source operating at 1310 nm and 1550 nm was employed to transmit optical signals through a 10 km spool of standard Single-Mode Fiber (SMF-28). The fiber was subjected to controlled temperature variations within a programmable chamber and mechanical stress using a precision bending platform. Attenuation was measured using an optical power meter, while chromatic dispersion and signal integrity were analyzed using an Optical Time-Domain Reflectometer (OTDR). In addition, Bit Error Rate (BER) and eye diagram analyses were conducted to assess system-level performance. The experimental results indicate that attenuation increases with rising temperature and decreasing bending radius due to enhanced scattering and macro-bending losses. Chromatic dispersion was found to be wavelength-dependent, with minimum dispersion near 1310 nm and higher dispersion at 1550 nm. Furthermore, BER analysis revealed significant degradation in signal quality with increasing transmission distance, which was corroborated by progressive eye diagram closure. Overall, the findings highlight the critical impact of environmental conditions on fiber optic performance and emphasize the need for effective system design, proper installation practices, and compensation techniques to ensure reliable high-speed optical communication.

Lightweight Cryptographic Watermarking Architecture for Resource-Constrained IoT and Edge Devices

2026-05-07T07:16:08+00:00

The proliferation of Internet of Things (IoT) ecosystems and edge computing infrastructures has created an urgent demand for security mechanisms capable of operating within the stringent resource constraints characteristic of embedded platforms—including limited computational capacity, minimal memory footprint, and severe power budgets. Conventional cryptographic watermarking schemes, designed for general-purpose computing environments, impose computational overhead that renders them impractical for deployment on microcontroller-class devices with clock frequencies below 100 MHz and available RAM of 64–512 KB. This paper proposes a novel Lightweight Cryptographic Watermarking Architecture (LCWA) specifically engineered for resource-constrained IoT and edge devices, integrating the PRESENT-80 lightweight block cypher with a computationally efficient Least Significant Bit Frequency Domain (LSBFD) watermarking scheme optimised through bitwise operations and lookup table acceleration. The architecture implements a pipeline processing model that overlaps cryptographic and watermarking operations, significantly reducing total processing latency compared to sequential execution. Hardware-software co-design principles are employed to identify and accelerate the computational hot-spots of both the cypher and watermarking algorithm through dedicated hardware acceleration units. The proposed architecture was implemented on an Xilinx Artix-7 FPGA and an ARM Cortex-M4 microcontroller platform for comprehensive evaluation. Results demonstrate that the proposed scheme achieves 98.7% of the security efficacy of full AES-256-DWT watermarking while consuming only 12.3% of the computational resources, 8.7% of the memory footprint, and 15.4% of the power consumption. The achieved throughput of 3.8 Mbps on the ARM Cortex-M4 platform at 168 MHz is sufficient for real-time protection of IoT sensor data streams.

IoT-based Three-Phase Supply Monitoring System

2026-05-28T04:34:55+00:00

The reliable operation of electrical power systems has become increasingly important in modern industrial, commercial, and residential environments where an uninterrupted electricity supply is essential. Among different electrical distribution methods, three-phase systems are widely preferred because they provide balanced power delivery, improved efficiency, and better performance while operating heavy electrical loads. However, these systems are vulnerable to several electrical faults such as overload conditions, phase failure, voltage imbalance, and short circuits. Such faults may damage electrical equipment, interrupt industrial operations, reduce system efficiency, and create unsafe working conditions. Because of these challenges, there is a growing need for intelligent systems capable of monitoring electrical parameters continuously and identifying faults in real-time. This study presents the design and implementation of an Internet of Things (IoT)-based three-phase supply monitoring and fault detection system using the ESP32 microcontroller. The developed system continuously measures current values in all three phases with the help of Hall-effect current sensors. The sensed electrical data are processed by the ESP32 controller to identify abnormal operating conditions such as phase imbalance, overcurrent, and phase failure. The ESP32 microcontroller was selected because of its compact design, low cost, integrated Wi-Fi capability, and efficient processing performance, which make it suitable for IoT-enabled monitoring applications. Whenever the system detects a fault condition, relay modules are activated to disconnect the affected supply and protect connected electrical equipment from further damage. At the same time, fault notifications are transmitted through email alerts and IoT communication platforms, allowing users and maintenance personnel to receive instant updates regarding the system condition. Cloud-based monitoring support also enables remote access to system information and historical data records. The proposed system additionally incorporates a GPS module to determine the geographical location of the fault. This feature is particularly useful in remote installations and distributed electrical systems where locating faults manually requires considerable effort and time. By integrating IoT communication with GPS tracking, the system provides an effective solution for both fault monitoring and fault localization. An approximate fault distance estimation method is also included in the system using basic electrical principles. By applying Ohm’s law and considering known line resistance values, the system estimates the approximate distance of the fault from the source. Although the method does not provide highly accurate measurements, it offers a practical and economical approach for identifying the possible fault region without requiring expensive equipment. The developed system is economical, scalable, and relatively simple to implement, making it suitable for small- and medium-scale monitoring applications such as industrial units, commercial infrastructures, educational laboratories, and smart grids. Experimental testing confirmed that the system can reliably detect different fault conditions and generate timely alerts. The integration of IoT technology improves real-time monitoring capability and overall system visibility, while the automatic isolation mechanism improves operational safety and equipment protection. Overall, the proposed system provides a practical and intelligent solution for improving the monitoring and management of three-phase electrical power systems.

Investigation of Interstage Impedance Effects on Gain and Bandwidth in Multistage RC-coupled Amplifiers

2026-05-29T04:32:15+00:00

This study investigates the influence of interstage impedance on the gain and bandwidth characteristics of multistage transistor amplifiers. Multistage amplifiers are extensively used in electronic systems to achieve high voltage amplification; however, impedance interactions between successive stages significantly affect their overall performance. In this work, theoretical analysis and experimental validation were carried out using RC-coupled common-emitter BJT amplifier configurations. The results demonstrate that improper impedance matching introduces loading effects, causing a reduction in effective voltage gain due to signal attenuation between stages. Experimental observations further show that increasing interstage impedance minimizes loading and improves gain performance. However, enhanced gain is accompanied by bandwidth reduction because of cumulative pole effects and interstage coupling. Frequency response analysis confirms that cascading amplifier stages shift the lower cutoff frequency upward and the upper cutoff frequency downward, thereby narrowing the overall bandwidth. The study also evaluates practical techniques such as impedance matching networks, emitter followers, and optimized coupling methods to balance gain and bandwidth requirements. The findings emphasize that careful interstage impedance management is essential for achieving optimal amplifier performance in practical electronic applications.