SEELAM SRINIVASA RAO; J. SIVA DEEPIKA. An Energy-Efficient Approximate Dadda Multiplier using Almost Full Adders, Majority-Logic 4:2 Compressors, and Clock Gating. Advance Research in Power Electronics and Devices, [S. l.], p. 19–28, 2026. Disponível em: https://matjournals.net/engineering/index.php/ARPED/article/view/3804. Acesso em: 5 jul. 2026.