Lukka Reena Madhuri, Navudu Hema Gopika Devi, Mukku Madhavi, Panchumarthi Jayapriyanka, Akula Mallaiah. Design and Implementation of a High-Performance 128-Bit Arithmetic Logic Unit Using Carry Look Ahead Adder, Vedic Multiplier, and Radix-2 Restoring Division. ARADC [Internet]. 2026 Mar. 30 [cited 2026 Jul. 5];:29-45. Available from: https://matjournals.net/engineering/index.php/ARADC/article/view/3313